<?xml version="1.0" encoding="utf-8" standalone="yes"?><rss version="2.0" xmlns:atom="http://www.w3.org/2005/Atom" xmlns:content="http://purl.org/rss/1.0/modules/content/"><channel><title>Hari's Blog</title><link>https://harisudarsan1.github.io/blog/</link><description>Recent content on Hari's Blog</description><generator>Hugo</generator><language>en-us</language><atom:link href="https://harisudarsan1.github.io/blog/index.xml" rel="self" type="application/rss+xml"/><item><title>Building an LLM Inference Engine from Scratch</title><link>https://harisudarsan1.github.io/blog/posts/2026-07-10-writing-an-inference-engine/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://harisudarsan1.github.io/blog/posts/2026-07-10-writing-an-inference-engine/</guid><description>&lt;h2 id="building-an-llm-inference-engine-from-scratch"&gt;Building an LLM Inference Engine from Scratch&lt;/h2&gt;
&lt;p&gt;I recently started exploring machine learning and AI from a systems engineering perspective. While most people begin by focusing on model training, I found myself much more interested in the inference side of the stack.&lt;/p&gt;
&lt;p&gt;I wanted to understand how deep learning models and neural networks work under the hood, but what fascinated me even more were the engineering breakthroughs that made modern LLM serving possible. Everywhere I looked, people were discussing innovations such as PagedAttention in vLLM, RadixAttention in SGLang, continuous batching, speculative decoding, fused attention kernels, and distributed inference.&lt;/p&gt;</description></item><item><title>GPU, CUDA, and the Ecosystem A Progressive Learning Path</title><link>https://harisudarsan1.github.io/blog/posts/2026-06-09-gpu-cuda-learning-path/</link><pubDate>Mon, 01 Jan 0001 00:00:00 +0000</pubDate><guid>https://harisudarsan1.github.io/blog/posts/2026-06-09-gpu-cuda-learning-path/</guid><description>&lt;h2 id="tier-1-gpu-architecture-deep-understanding"&gt;Tier 1: GPU Architecture (deep understanding)&lt;/h2&gt;
&lt;h3 id="stanford-cs149-lecture-7--kayvon-fatahalian"&gt;Stanford CS149 Lecture 7 — Kayvon Fatahalian&lt;/h3&gt;
&lt;p&gt;The best lecture on SIMT execution model, warp scheduling, memory hierarchy, and occupancy. Start here. Videos on YouTube.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;URL:&lt;/strong&gt; &lt;a href="https://cs149.stanford.edu"&gt;https://cs149.stanford.edu&lt;/a&gt;&lt;/p&gt;
&lt;h3 id="programming-massively-parallel-processors--kirk-hwu-el-hajj-4th-ed"&gt;&amp;ldquo;Programming Massively Parallel Processors&amp;rdquo; — Kirk, Hwu, El Hajj (4th ed.)&lt;/h3&gt;
&lt;p&gt;The canonical textbook. Chapters 1-4 = architecture fundamentals. 4th edition covers tensor cores and Hopper.&lt;/p&gt;
&lt;p&gt;&lt;strong&gt;URL:&lt;/strong&gt; &lt;a href="https://www.sciencedirect.com/book/9780124159921/programming-massively-parallel-processors"&gt;https://www.sciencedirect.com/book/9780124159921/programming-massively-parallel-processors&lt;/a&gt;&lt;/p&gt;
&lt;h3 id="brendan-lynskey--nvidia-gpu-architectures-series"&gt;Brendan Lynskey — NVIDIA GPU Architectures Series&lt;/h3&gt;
&lt;p&gt;Deep dives on warp scheduling internals, SIMT vs SIMD nuance, memory latency per architecture, TMA on Hopper. Diagrams + assembly snippets.&lt;/p&gt;</description></item></channel></rss>